Penn Engineers Develop CMOS-Compatible Vertical Toroidal Inductor for On-Chip Integration

PHILADELPHIA – December 2, 2025 – Researchers from the University of Pennsylvania’s MicroSensors and MicroActuators Group have unveiled a breakthrough vertical toroidal inductor embedded directly into silicon wafers, enabling ultra-compact on-chip integration for power converters and high-frequency electronics. The study, published in a leading microelectronics journal, details a CMOS-compatible fabrication process that overcomes the challenge of embedding 3D magnetic structures in deep silicon trenches.

The prototype vertical toroidal inductor achieves an inductance of 60 nH, a DC resistance of 399 mΩ, and a quality factor of 17.5 at 70 MHz—performance metrics that rival conventional surface-mounted inductors while occupying significantly less space. By utilizing multilevel wafer etching, cavity shaping, and through-wafer interconnects, the team successfully integrated the inductor into the silicon substrate, with digital control circuitry and power switches positioned on the wafer surface. This design reduces the overall size of DC-DC converters by up to 40%, addressing a major bottleneck in the miniaturization of portable electronics, wearables, and IoT devices.

“Embedding vertical toroidal inductors within the silicon bulk unlocks unused volume, enabling more complex and compact systems,” said the lead researcher. The technology is particularly promising for next-generation 3D ICs and power management modules, where space efficiency and thermal performance are critical. The team is currently collaborating with semiconductor manufacturers to scale the process for mass production.